Bob Ayers
Well-Known Member
The first photo is of a photo of a silicon chip I helped develop back in the
80's. The state of the art in chip technology was 1uM (micron). Just for comparison, the state of the art in chip technology's geometries today (in production) is 35nM (35 nanometer, or 0.035uM).
The following photos are the module the chip is in, and the card that it is used on. The module is a 36mm pin-through-hole ceramic module. The card
is a Token Ring Adapter, which was a networking protocol, similar to Ethernet:
80's. The state of the art in chip technology was 1uM (micron). Just for comparison, the state of the art in chip technology's geometries today (in production) is 35nM (35 nanometer, or 0.035uM).

The following photos are the module the chip is in, and the card that it is used on. The module is a 36mm pin-through-hole ceramic module. The card
is a Token Ring Adapter, which was a networking protocol, similar to Ethernet:







